1. Field
Embodiments relate to a semiconductor device, and more particularly, to a semiconductor device and a memory system having a delay-locked-loop circuit.
2. Description of the Related Art
A delay-locked-loop (DLL) circuit is a circuit that generates an internal clock signal synchronized with an external clock signal through a synchronizing process based on a delay amount of a signal.
Semiconductor memory devices such as dynamic random access memories (DRAMs) are used for storing data in computers and electronic products. Data is written to a DRAM device during a write operation mode, and is read from the DRAM during a read operation mode. The output circuit of the DRAM device needs a clock signal such as a data strobe (DS) signal when data is read from the DRAM device. An internal clock signal synchronized with an external clock signal is needed to output the data exactly. Recently, in semiconductor memory devices such as DRAM devices, a clock signal used in the semiconductor memory device is synchronized with the output clock signal by a DLL circuit.